1. Field of the Invention
The present invention relates to a method for connecting a semiconductor chip to a substrate. In particular, the method involves cold welding of indium bumps to an indium alloyable metal. The invention further relates to a device formed by the method of the present invention.
2. Description of Related Art
Cold weldable indium bumps are used to interconnect semiconductor chips to a substrate. The connection process is typically used for detector multiplex array electrical connections of integrated circuits, for semiconductor chips, such as flip chips, and for other products. Prior art bump and pad arrangements have been in use since the 1960's. These include the well-known solder-to-solder bump contact, the indium-to-indium bump contact, and the gold-to-gold contact. Each of these contacts is processed by means of a reflow procedure, and the bump and pad structures may be welded together in any conventional welding manner. The trend in electronics is towards high frequency circuits and increasing use of flip chips (i.e., chips with tabs on the bottom that require bottom connections). This is because flip chips, as compared to tape automated bonding (TAB) or wire bond chips, can reliably accommodate smaller connections which permit higher pad packing densities. Also, flip chips can be more densely packed in the available cross-sectional area on a substrate.
Typically, flip chips have interconnection pads only at the chip periphery, which might require only 256 bonds. Other types of flip chip sensors have over 16,000 indium bonds per chip in a "checkerboard" pattern. The failure or 10 intermittency of just a few interconnections can lead to scrap/rework of very expensive chips. Low yields have been reported for the indium-to-indium cold weld process. This is an especially critical problem because of the extensive use of flip chips.
Previously, flip chips were either lead-tin solder melt interconnected (soldering) or indium-to-indium cold welded. Both of these processes have limitations, as discussed below.
In soldering, the solder and the substrate and/or flip chip must be precisely aligned so that the solder on one part intimately faces the solder on the other part. For a connection involving 256 pads, for example, the solder on each of the 256 pads must be touching or in close proximity to the mating surface. This condition needs to be maintained during thermal exposure so that the solder on each pad not only melts but cross-wets the opposing solder to form a structurally sound bond with only the corresponding opposite mating surface. In addition, solder mass and degree of gap at the interface for all 256 pads must be carefully maintained within close tolerances since extrusion or splattering of melted solder or excessive bulging could cause electrical shorting of adjacent pads.
Other problems with soldering include the required high temperatures which can degrade some semiconductor chips. This can be further aggravated by subsequent solder melting that is many times required when removal and rework prove necessary. This thermal removal problem is made even more difficult if there are other chips in the local vicinity that might be affected during the heat exposure. Thus, the ability to rework the chip can be limited.
In cold weld indium interconnection, the method requires indium bumps on the chip and the substrate to be of precise mass, geometry, and height. The chip and substrate are precision aligned so that all indium bumps can be brought into pressing contact. The chip and substrate are pressed together at sufficiently high pressure to cause fusion of the indium bumps on the opposing surfaces. Bonding is essentially done at room temperature as melting of the indium is not required.
The resulting cold weld indium bump joint serves the dual function of being an electrical connection while also achieving mechanical attachment of the chip to the substrate. This mechanical attachment has a tensile strength at the contact interface of less than 400 pounds per square inch (psi), or 2.07.times.10.sup.4 millimeters of mercury, which represents a relatively weak bond strength across the cross-sectional contact interface. These relatively weak connections give an acceptable yield when the thermal expansion is about the same for the chip and substrate. However, when there is a thermal expansion mismatch, bond failure does occur at the indium-to-indium contact interface during thermal cycle testing of the device, and low yields have been experienced. The net effect, when coupled with variations in indium bump mass, geometry and height control, planarity, registration alignment and differential material thermal expansion, has resulted in low process yields.
Although indium-to-indium bonding can be achieved in a room temperature process, bond strength is quite limited. Improvements in bond strength have been achieved by cold bonding of indium to gold, as disclosed in U.S. Pat. No. 4,930,001, assigned to the present assignee. While very useful for its intended purpose, this indium-to-gold alloy bond has certain thermal limitations, which cause bond failure. More specifically, in an indium-to-gold alloy bond, the alloy consists of a new phase or phases where there is a chemical bond between the indium and gold which is stronger than either metal alone. However, over a long period of time solid state diffusion or thermal cycling of these bonds results in the formation of relatively thick primary and secondary intermetallic phases which weaken the bond. Consequently, indium-to-gold alloy bonds are initially strong, but with the passage of time and/or thermal cycling, these bonds become weakened, even to the point of failure. The term "primary intermetallic phase" is used herein to mean a compound of the two or more single phase metals or metal alloys forming the bond, which is a separate phase and of a single composition. The term "secondary intermetallic phase" is used herein to mean a compound of the two or more single phase metals or metal alloys forming the bond, which is a separate phase and of varying composition. Other metals which form primary intermetallic phases when alloyed to indium include antimony, arsenic, bismuth, copper, magnesium, manganese, nickel, silver, and thallium.
Accordingly, there an on-going need to develop improvements in the alloying system to which indium bumps are bonded. It would be advantageous in the formation of indium cold weld bonds if alloying metals were available for creating more metallurgically sound bonds than indium-indium or indium-gold bonds. The low yields seen in the indium-to-indium cold weld process considerably increase the cost of production. It would be desirable to have a process with increased yield at lower cost. It would be further desirable to have a process highly applicable to a flip chip product that created strong and reliable indium cold welded bump electrical connections between the pads on the semiconductor chip and substrate. It would be further desirable if such a connecting process created a less thermally-sensitive connection and still resulted in a strong and reliable cold welding connection of semiconductor chips to their substrate.